Post on 28-Jan-2021
Circuit Integration for RF and Microwave Applications
1
Thierry PARRA, ProfessorUniversité Paul Sabatier - Toulouse III
Laboratory of Analysis and Architecture of Systems - CNRSparra@laas.fr
June 2010
Introduction : MicroWave and Telecommunications
1- Microwave circuit technologiesSubstrate and technologiesIntegration issueElements of technology
Microwave Active Circuits Overview
4- Frequency conversionComponentsNoise issuesFrequency multipliers
2
Elements of technologyComparison of the main technologiesDesign constraintsCAD for MIC and MMIC
2- Linear operation vs non-linear
3- AmplificationDefinitionsLow level amplifiersLow noise amplifiersPower Amplifiers
06/2010Pr. Thierry PARRA
parra@laas.fr
Frequency multipliersMixers
5- Frequency generationApplicationsOscillator principleOscillator large signal modelOscillator analysisExamples of realisations
Knowledge requests
- S parameters (scattering parameters)
- Smith chart (impedance matching, …)
- dB, dBm, dBv, …
- Components for microwave applications (MESFET, HEM T, PHEMT, HBT, diodes …)
- Analog electronics (transistor operation, biasing, …)
3
Nonlinear microwave circuitsStephen A. Maas - Hartech House, 1988
Handbook of microwave integrated circuits HOFFMANN R. K., Artech House, 1987
COPLANAR MICROWAVE INTEGRATED CIRCUITSWolff I., Wiley Interscience, 2006
HIGH-FREQUENCY AND MICROWAVE CIRCUIT DESIGNCharles NELSON, CRC PRESS, 2008
Bibliography
4
MICROWAVE CIRCUIT DESIGN USING LINEAR AND NON LINEA R CIRCUITSVENDELIN G; PAVIO A; ROHDE V, WILEY, 2005
RF AND MICROWAVE CIRCUIT DESIGN FOR WIRELESS COMMUN ICATIONSLARSON L E, Editeur (scientifique), ARTECH HOUSE (MOBILE COMMUNICATIONS SERIES), 1997
THE RF AND MICROWAVE CIRCUIT DESIGN COOKBOOKMAAS S A, ARTECH HOUSE, 1998
MMIC DESIGNROBERTSON I D, Scientifique Editor, IEE, 1995
Fundamentals of RF and Microwave NF measurementsApplication Note Agilent AN57-1
Trends of the domain
costMass production
Number of functionalitiesElectrical performances
(frequency & consumption) Integration density
Reliability
(or optics)
5Computer Aided Design (& modelling)Circuit topologiesTechnologies (active components and passives)
Microwave Integrated Circuits(MIC)(hybrid technology)
System applications>>> collective technologies
Microwave Monolithic Integrated Circuits (MMIC)
Circuit integration>>> multi-function chips
Fulfill all trends needs further developments on:
Main substrates
Substrate Si GaAs InP GaN on SiC
Permittivity 11,9 13 12,4 9
Resistivity(ohm.cm)
5 – 10 105 104 -
Mobility e- at 300K(cm2.V-1.s-1)
1500 8500 5000 1000
Mobility e+ at 300K(cm2.V-1.s-1)
600 300 100 350
6
(cm2.V-1.s-1)
Thermal conductivity(W.cm-1.K-1)
1,5 0,46 0,7 1,3
Dilatation Coef.(dL/LdT).10-6
2,5 6 4,5 -
Oxydation(MOS transistor)
yes no no no
Cost Low cost (x1)6” Wafer (300mm )
Cost x104“ wafer
Cost x 503“ wafer
Cost x1000
Mobility : must be weighted because it can be increased using compounds and specific structures as heterostructure or pseudomorphic stacks
Main technologies
Component MESFET (GaAs)
HEMT (AlGaAs/GaAs, GaInP/GaAs)
HEMT (InP)
(metamorphic)
PHEMT (AlGaAs/InGa
As)
TBH (Si/SiGe)
ft (GHz) 30 à 40 60 150 80 150 to 200
fmax (GHz) 50 70 170 100 170 to 230
Vmax (V) 15 8 3 to 6 10 3 to 6
Fmin (dB) @10 GHz 1.5 1 0.3 0.5 1 to 2
7
Other components: �TBH : GaInP/GaAs or AlGaAs/GaAs�Bipolar Transistor on Si, HEMT Si/SiGe
fc of 1/f noise (MHz) 100 100 100 10 1.10-3
Gm (mS/mm) 100 250 600 700 5000
Cost (euro/mm2) 2 10 2 0.6
CMOS technologies: ft and fmax ~ 95GHz and 120GHz, respectivelly, but with Lg ~ 90nm (while Lg=250 nm for PHEMT)
LDMOS technologies: power amplification up to 6GHz (high voltage withstanding)
Technology versus power and frequency of applicatio ns
Output Power (W)
SiC
Broadcastingstations
Communicationsatellites
100
1k
10k
Future of GaN which will extend solid state circuit application domain
8
Operating frequency (GHz)
GaAs / InP
SiC
Mobile phone
Radar
GaNPhoneBase
stations
Solid State circuit / tube limit
silicon
0.1 1 10 100 1000
0.1
1
10
Microwave Integrated Circuits
Hybrid technology (MIC = Microwave Integrated Circu it)
�Several integration levels:- Typical (3 metal layers max.): MIC- High density (multilayer metals / dielectrics): HMIC- Miniaturized (integration of all passives): MiMIC
� Substrate: alumina, teflon, epoxy, etc…� Metallisations: Au, Au + NiCr, Cu, etc…
� Active components or MMICs are reported with
Dielectric Resonator Oscillator 24 GHz25×12mm² IMST GmbH
9
� Active components or MMICs are reported with sealing and bondwires (some passives as well)
LTCC Module Tx GSM multi-band 9×10mm² Freescale
MobilePhone Multistandard PA module 8x8 mm2 Freescale
Microwave Monolithic Integrated Circuit
Monolithic technology (MMIC = Monolithic MIC)
�All actives and passives integrated on same substrate� Photolithography (12 to about 20 mask levels)� Integration densities depend on the technology
(Silicon, GaAs, …, FET, HBT, …)
Xband LNA 9-11 GHz (pHEMT InGaAs2.7×1.7mm²) Astra Microwave Products
10
Phase Lock Loop 10GHz (SiGe HBT, 1x1 mm2) LAAS
100 µµµµm
RF
PA
DS
LOPADS
RXIF
Zigbee compatible receiver 2.4 GHz (90nm CMOS, Die area : 0.4 x 0.17 mm2) LAAS & STMicroelectronics
Manufacturer = FOUNDER (foundery)
Elements of technologies
Wire length minimization (important when thick dies)
MiMIC cross section
3 mm
11
Metal
MMIC cross section
150 µm
Passivation
Via hole
capacitorMESFETResistor
Airbridge
Technological start : the photolithography
RésineMasque
UV
photosensible
Substrat
RésineMasque
UV
photosensible
Substratinsolation
development
substrate substrate
Photoresist (light sensitive)
Maskquartz
12
development
etching deposit
Photoresist cleaning
Photo-etching Lift-off
MIC Technology
1-Vias opening through the substrate (laser)
2-Resistive layer deposit (NiCr or TaN)5-Dies sealing and wire-bonding
13
3-Conductive layer sputtering and electrolytic Deposit (Au or Cu)
4-Photo-etching of layers
�Integration of lines and resistors�Platings can be done using silkscreen printing�Via process is expensive (alumina)�Inductors can be integrated using omega topology (only 1 conductor level)Rline
MIC LTCC Technology
LTCC = Low Temperature Cofired CeramicMultilayer interconnection Circuits(15 metallic layers, up to 40GHz)
This technology allows “Multi-Chip-Modules”
14(Source : www.ltcc.de)
t°~1000°C
MMIC Technology (GaAs) 1/3
15
MMIC Technology (GaAs) 2/3
16
MMIC Technology (GaAs) 3/3
17
Comparison between MIC and MMIC 4/6
�Weight, size�Cost (average and large productions)�Reproducibility (limited process variations)�High frequency performances (small parasites)�Dedicated for some applications
(distributed amplifier, balanced circuits …)
�Limited choice for components MMIC versus MIC: DRAWBACKS�
MMIC versus MIC: ADVANTAGES� Chip size (mm) Process yield (%)1x1 80
2x2 70
5x5 45
7x7 30
10x10 20
Conductor Skin depth (µm)
18
�Limited choice for components (+ trade-off on performances)
�Circuits can not be tuned�Fabrication time (3 to 6 months)�Cost of fabrication facilities�Fabrication yield�Skin effect
SYNERGY of TECHNOLOGIES�MMIC
�mass market circuits �small size requirements (active antenna)
MIC
� High performances circuits (choice of best component, model accuracy, tuning)� packaging and system card
Conductor Skin depth (µm)
2GHz 5GHz 10GHz
Cu 1.46 0.92 0.65
Al 1.88 1.19 0.8
Au 1.77 1.12 0.79
Comparison between MIC and MMIC 5/6
Device Modelling�
MMIC
� Components are not fabricated (models must be generic for the technology)
� Models must fit many functions (they are not dedicated to the only considered one)
MIC
� Components are on the shelf (they have been already fabricated and can be modelled by the user)
� Selection of the best model, matching the application
� Selection of the characterisation
19
considered one)� Models must take into account the
technology but also the process (statistic variations)
Design is made on components-to-be
� Selection of the characterisationmethods
� Integrated components can be the modelled ones
Design is made on actual components
Library which must be used by users(models, scale rules, layout, design rules)
Datasheet if required by users(measurements, model extracted from
typical performances)
Comparison between MIC and MMIC 6/6
� Choice of passive element topology����distributed elements
Zc
l
Zr Z(l) ≈ Zc Zr + j.Zc.β.lZc + j.Zr.β.l
l
Zc
Z ≈ j.Zc.β.l
Z ≈j.β.lZc
20
����lumped elements (spiral inductor, MIM capacitor)
GHz0 10 20 30
distributed
lumped
transistors
MIC+MMIC
MIC
MMIC
MIC+MMIC����How to chose ?
Silicon versus III-V MMIC technologies
Al (Cu for the last level)
~ 6 µm
M2
VIA
Au
Nitride
21Silicon technology III-V technology
~ 6 µm
Si Substrate
Si Substrate
M1
GaAs Substrate
ActiveCO
Back Metal
VIA HOLE
~ 100 to 200 µm
Mask set-up
Dicing Street
X
Y
Process Control Monitor (PCM)
1x1,5 mm²
1x3 mm²
2x1,5 mm²
2x3 mm²
Dicing Street
Multiproject organisation constraint
22
Alignment patterns
PCM: •uniformly distributed on wafer•group of test structures•process step control (destructive test)•electrical performance guarantee of components
1x1,5 mm²Dicing Street
Reticule (several circuits assembly and duplicated on the mask)
Design rules
�Basic layout rules outline: •Minimum spacing between 2 shapes on same or on different layers (example below) •Minimum overlap between 2 layers (example below)•Minimum width and length of a shape on a layer•Minimum density on a level for Si technologies (planarization purpose)
�implementation of “dummies“ (electronically useless but need to be without any electronic influence, as well)
�Because a standard technology is about 15 masks (with about 1 hundred shape per layer), the checkout is done by computer using DRC tools: Design Rule Check
23
checkout is done by computer using DRC tools: Design Rule Check
M1
M2Insulator
�Examples of design rule arguments
Capacitor surface
The capacitance C depends on process
The capacitance C stays the same whatever misalignments are
MIM capacitor layout Etching conditions
Spacing is too small for a good etching
substrate
resist
Technological process variations
���� 3 kinds of process variations occur:
-On a same wafer, in relation with the circuit location (Wafer )-Between 2 wafers processed simultaneously (Run )- Global variations of the technological process, when various runs within several months (Techno )
���� From these process variations, the founder provides a statistical model
���� Statistical analysis methods
- Worst case (all values set to limits, gives an envelope for performances)
Electricalparameter
Number of samples
RunWafer
Techno
24
���� Design centering
- Worst case (all values set to limits, gives an envelope for performances)- Monte Carlo (random setting of values, gives a fabrication efficiencywhen 200-250 runs are performed)
Min Nom Max
Optimized circuit
Spec.
Parameter value
Per
form
ance
Min Nom Max
Centered circuit
Spec.
Parameter value
Per
form
ance
RunWafer
Main CAD tools 1/2
Electrical commercial simulators have been developed to reach design software platforms (in a single environment, they include all tools : schematic interface, simulator + optimizer, layout , statistics, DRC, translator as GDSII)
Advanced Design System (ADS) of Agilent : dedicated for microwave circuit design, frequency domain (linear) and harmonic balance (non-linear) simulations, time representation is obtained by Fourier Transform, includes a lot of electrical models for interconnections, passives … , III-V foundry often provides its library for this platform, e.m tool
Cadenceof Cadence Design Systems, Inc.: initially for low frequency silicon circuit design,
Advanced Design System (ADS) of Agilent
� dedicated for microwave circuit design� frequency domain (linear) and harmonic
balance (non-linear) simulations
Cadenceof Cadence Design Systems, Inc.
� initially for low frequency silicon analog and digital circuit design
� time domain simulation (Spice)
25
Cadenceof Cadence Design Systems, Inc.: initially for low frequency silicon circuit design, time domain simulation (Spice), frequency representation is obtained by Fourier Transform, parasites are extracted and must be inserted into simulation (LVS : Layout versus Schematic), Silicon foundry often provides its library for this platform
But during their evolution they are converging to the same solution (Ptolemy for ADS, Spectre RF for Cadence) & Golden Gate (interface between Cadence and ADS)
� time representation by reverse Fourier Transform
� includes a lot of electrical models for interconnections, passives …
� III-V foundry often provides its library for this platform
� e.m tool
� time domain simulation (Spice)� frequency representation is obtained by
Fourier Transform� parasites are extracted as RC and must be
inserted into simulation (LVS : Layout versus Schematic)
� Silicon foundry often provides its library for this platform
But in their evolution they are converging to the same solution (Ptolemy for ADS, Spectre RF and HB module for Cadence) & interface between Cadence and ADS & Golden Gate (ADS engine into Cadence)
Main CAD tools 2/2
Electro-magnetic (e.m.) simulators: 2D or 3D Maxwell equations solving
� to get performances of specific structure not modeled yet (example : uniplanar interconnections)
� to take into account coupling between circuit elements
� to verify performances of high frequency circuits (millimeter-wave) because the
26
Sonnet and Momentum (implemented into ADS) : 2.5D softwares, they can not analyze coupling between 2 metallic planes but consider transitions between 2 planes
HFSSof Ansoft : actual 3D software
circuits (millimeter-wave) because the smallest metallic part or discontinuity can have serious impact
� time and computer resource consuming
The aim of a simulation (electrical or e.m.) is to be as close as possible to the actual circuit which will be fabricated
Interconnection basics
Microstrip Line (MSL)
Substrate
Ground plane
Ground plane Ground plane
•A lot of models into electrical softwares (ADS)•Very compact when designed in a Si technology
(thin substrates)•Vias are required for connecting ground
27
Coplanar Strips (CPS)Coplanar Line (CPW)
Substrate
Ground plane
Substrate
•Technological step removal (as via hole for a GaAs technology)•Reduced dispersion versus frequency•Less radiating structures•Only few models (em simulations are often required)•CPS fit quite well differential applications•CPW can also be designed as grounded CPW
The steps of a design
Initial description(ideal passive components)
Linear simulations Non-linear simulations
Optimized Description
Sensitivity analysis
Real components
CharacterizationsModeling
Active components complete model
Performances must not be to much sensitive to a component value (fabrication dispersions)
28
Real components
Layout
Parasites extraction
Statistical analysis Design centering
For increased fabrication efficiency
Design Rule Check
Fabrication
Characterizations
Components positioning Line length readingLayout versus Schematic (LVS)
Layout translated into GDS II
MMIC circuit elements 1/3
Airbridge details (connection of an inductor and a capacitor)
29
Thin film resistor
Resistor could be implanted, as well (low cost but non-linear : the resistance depends on the applied voltage)
MMIC circuit elements 2/3
MIM capacitor (metal quality difference vs level); MOM capacitor as well (capacitance per surface unit is a bit less but a dielectric level is avoided)
30
Airbridge inductor (loss issues because skin effect)
MMIC circuit elements 3/3
Medium power MESFET details
31
Transistor power capabilities increase:Width enlargement is limited (because Rg,
gate SWR…)Parallel implementation of gate digits
D
S
G
D
S
G
D
S
G
D
S
G
Modelling basics 1/2
Transistor: parameters of the model are given for a size and a bias > the model must be parametric
32
Line: each metal level has its own model
Modelling basics 2/2
Inductor : model is semi-empirical, based on measurements or em simulations
Resistor: it is a resistive line
33
Capacitor: realized from two lines, top electrode connected with an airbridge for high breakdown voltage
Probe test 1/2
DC Probe
34
Microwave ProbeDUT
Microwave probing:-Probe station (weight for mechanical stability)-Optical binocular system-Antivibrating table
Probe test 2/2
RF Probe(coplanar, pitch between probe tip : 100 to 200 µm)
DC Probe(needles)
35
Uniplanar frequency converter test (14 GHz >>12 GHz conversion)
100 to 200 µm)
DC & RF Probe(mixed card)
MMIC specific circuit topologies 1/2
GaAs distributed amplifier 2-18 GHz
This concept needs a good phase control on each “line”, only possible with MMIC (in-phase power combining)
36
Input
OutputVd
Vg
MMIC specific circuit topologies 2/2
Good differential structures only possible with MMIC (technological dispersion on transistors and interconnects)
37
SiGe frequency double balanced converter (20 GHz >> 1 GHz conversion)
MMIC schematic extraction
38
PadsCapacitorsVia holes
Metallic levels (transitions)Active componentsInputs / OutputsResistors (thin film or implanted)
Knowledge+
Coherence
Microwave Linear and Non-linearActive Circuits
39
Active Circuits
Thierry PARRA, ProfessorUniversité Paul Sabatier - Toulouse III
Laboratory of Analysis and Architecture of Systems - CNRSparra@laas.fr
June 2010
Introduction
Microwave applications- mass market & industry : terrestrial telecoms systems, satellite links , car radars, air navigation- instrumentation - scientific research: detectors for astronomy, observation satellites- military : Radars, telecoms hardened systems, …
Main microwave circuits
-Passives (interconnections, R, L C, couplers, filters …)
- Amplifiers :
Silicon Labs -
40
- Amplifiers :LNA - receiver
(LNA = Low Noise Amplifier),PA- transmitter(PA = Power Amplifier)
- Devices for frequency conversion (multiplication, mixing)
- Sources :* Sinusoidal oscillators* Pulse generators (ultra wide band systems like Wireless USB, UWB …)
Linear and Non-Linear operation 1/3
t
Vo
Vd
Id
t
Vo
Vd
Id
Every component or circuit can present linear (small signal) or non-linear (large signal) operation
Bias point Bias point
41
Vi
t
Vi
t
A periodic non- sinusoidal signal can be expressed as a Fourier Series
� a distorted sinusoidal signal is the sum of several sinus. Example of periodic square:
Bias point = quiescent point
( ) ( ) ( ) ...5sin..5
.43sin.
.3
.4sin.
.4 +++= tXmtXmtXmX ωπ
ωπ
ωπ
Non-Linear operation � frequency generation
Linear and Non-Linear operation (time / frequency) 2/3
Graph : Agilent AN-150
42
Linear and Non-Linear operation (comparison) 3/3
Linear operation (or quasi-linear):
Non-Linear operation :
Circuit
Circuit
43
Non-Linear operation :
Circuit
Circuit
Harmonic frequencies
Excitation/Fundamental frequencies: f1, f2Harmonic frequencies: mf1, nf2 where (m, n)∈Z2Intermodulation/mixing products: mf1 ± nf2
Circuit response issues
A circuit is never only linear, and its output v s can be expressed versus the input v e as follows (1 st degree approximation):
The non-linearity is then addressed following two w ays:
1. One tries to reject the non-linear behavior as far as possible (amplitudes) for minimizing signal distortions (amplification, filtering …, see 3rd order intermodulation)
1-a. If ve
Amplifiers - definitions
Amplifier = quasi-linear two port network
Several kinds of amplifiers defined from their main characteristics:
- Small Signal: use to amplify IF signal, only the gain is specified- Low Noise(LNA): used at the front end of receivers, specifications are on gain and S/N ratio deterioration- Power (HPA, SSPA) : used at the output of transmitters, (gain) output power and efficiency are the specifications
Main electrical characteristics include:
- Gain, input and output matching- Stability- Noise Figure (NF)
45
- Linearity (compression point, intermodulation, etc…)- Output power and efficiency
At microwave frequencies, power measurements are ex pressed into: dBm
The dB is not really a measurement unit. It is quan tifying only the comparison between two powers (ratio):
If P2 is set to 1mW (the reference), then P 1 is compared to 1 mW (the reasonof the « m » of dBm):
( ) 12
10 logP
G dBP
= ⋅
[ ][ ] [ ]( )
11 13
10 log 10 log 3010dBm
P WP P W
W−
= ⋅ = ⋅ +
Amplifier Power Gain 1/3
Transducer Gain:
The amplifier (transistor) is driven by a source wi th a particular impedance, and that its output is connected to a load with a particular imp edance
46
Transducer Gain:
It gives the ratio of the power delivered to the load PL to the power available from the source
Pavs . It depends on both ZL and ZS, and it is often used to design amplifiers which exhibits a
maximum small signal gain.
With and out then and
Amplifier Power Gain 2/3
Power gain
It is the ratio of power dissipated in the load ZL to the power delivered to the input of the
amplifier, making it independent of the source impedance Zs (the input is supposed to
be matched Γs = Γin* ). It is often used for power amplifier design , where load
impedance is critical (see later).
The power gain (or operating power gain) is defined to be:
GP = PL / Pin resulting to
22
212 2
11
1 1L
PG SS
− Γ= ⋅ ⋅
− Γ − Γ
47
212 2
221 1P
e LS− Γ − Γin
Available power gain
It is the ratio of the power available at the amplifier output to the power available from the
source Pavs (the output is supposed to be matched ΓL = Γout* ). It is commonly used for
LNA design , as it is a function of the source impedance, but not of the load impedance
(see later).
The avalaible gain is defined to be:
GA = Pout / PavS resulting to
2
2
212 2
11
1 1
11
g
P
sg
G SS
− Γ= ⋅ ⋅
− Γ− ΓS
S
out
A
Amplifier Power Gain 3/3
2
max 212 2
11 22
1 1
1 1UG S
S S= ⋅ ⋅
− −
Unilateral gains: If the amplifier is unilateral S12 = 0 and then Γin = S11 and Γout = S22
These conditions yield to the unilateral transducer gain:
This expression is an approximation but can be useful for initial design, as it removes the effect
of the load impedance on the source side.
Moreover, if we consider the amplifier is perfectly matched on input and output ( Γout = ΓL* and
Γin = ΓS* ), we defined the maximum unilateral gain:
48
Discussion on gain definitions:
The Transducer Gain GT is the general definition
- if ΓS = Γin* : the amplifier input power is the source maximum available power � GT = GP
- if ΓL = Γout* : the power at the load is the amplifier output maximum available power � GT = GA
GT leads to the smallest gain value, since none of input and output ports are matched
When the amplifier input and output are matched: GT = GP = GA
If all terminals are matched on 50 Ω, then: GT = GP = GA = |S21|²
11 221 1S S− −This expression is useful for evaluating the maximum gain value that can be reached
Two port network stability 1/3
Matching the network consists to solve the
The two port network is not unilateral ( S12 ≠ 0) ���� positive feedback at certain frequencies, resulting in oscillation, or instability.
For unconditionally stability we need to ensure that
| ΓinΓS | < 1 and | ΓoutΓL | < 1
(the only way to ensure that the signal does not grow to infinity)
Because | ΓS | < 1 and | ΓL | < 1, these conditions are resumed in: | Γin | < 1 and | Γout | < 1
( )* 12 2111 1g e LS S
SS
Γ = Γ = + Γ ⋅ − ΓS in
49
Matching the network consists to solve the system of equations:
Of which the solutions are:(with ∆ the determinant of the network S matrix)
It can be verified that : with
K is the Rollett factor .
2 2 2
1 11 221B S S= + − − ∆2 2 2
2 22 111B S S= + − − ∆
*1 11 22C S S= − ∆
*2 22 11C S S= − ∆
( )2 2 22 2 21 1 2 2 12 214 4 4 1B C B C K S S− = − = − ⋅2 2 2
11 22
12 21
1
2
S SK
S S
+ ∆ − −=
( )
( )22
* 12 2122
11
1
1
L
L s gg
S
S SS
S
− ΓΓ = Γ = + Γ ⋅ − Γ
out SS
221 1 1
1
222 2 2
2
4
2
4
2
g
L
B B C
C
B B C
C
± −Γ = ± −
Γ =
S
21122211 SSSS −⋅=∆
Two port network stability 2/3
The stability can be discussed from values of the Rollet fact or K and of the determinant ∆∆∆∆ ofthe network S matrix:
- K > 1 et | ∆∆∆∆| < 1: the network is unconditionally stable. It can be possible to find a couple (ΓS ,ΓL)
which reaches the simultaneous input and output matching (maximum gain).
- K > 1 et | ∆∆∆∆| > 1: the network is conditionally stable (see further slide). The simultaneous input and
output matching is still possible.
50
In these two precedent situations, the transducer gain GT can be written:
si |∆| < 1 and si |∆| > 1
-| K | ≤≤≤≤ 1: the network is conditionally stable (see further slide). This network can not besimultaneously matched on input and output: maximum gain can not be reached.
- K < −−−−1: the network is unconditionally unstable. Nothing is possible.
21 2
12
1cS
G K KS
= ⋅ + −T21 2
12
1cS
G K KS
= ⋅ − −T
Two port network stability 3/3
If a network is only conditionally stable ���� find the good source and load impedances forstability
On the network input :
For stability, we need to find values of ΓL which ensure:
If we report on the Smith chart values of ΓS as: we obtain a circle whichradius is R and the center C
The equation for the circle doesn't tell us whether the stable region is: the inside of the stability circle, or the R
( )* 12 211122
11g e L L
S SS
SΓ = Γ = + Γ ⋅ ≤
− ΓS in
12 2111
22
11L L
S SS
S+ Γ ⋅ =
− Γ
51
C
O
stable region is: the inside of the stability circle, or the outside ?
The easiest to answer this question is using a test point. And the simplest point is ΓL = 0 (the center of the Smith chart) . Then Γin = S11
If S11 < 1 then the outside region of the stability circle is the stable region.
the same procedure applies for the load stability circle for finding values of ΓS leading to Γout < 1* *
22 112 2
22
S SOC
S
− ∆=− ∆
12 21
2 2
22
S SRayon
S=
− ∆
R
R
Two port network noise 1/2
Because an amplifier is a noisy two port network, t he noise study is of first importance for LNA design
The noise is from several sources:
White noise sources (found at high frequencies in linear circuits – also called additive noise )- Thermal noise also called diffusion noise (carrier velocity fluctuations caused by collisions inside crystal or with impurities)- Shot noise (current fluctuations when a junction is direct biased)
Low frequency noise sources (this noise is translated around the carrier when non-linear operation – see later)- trapping/release noise (Lorentz spectrum: the power spectral density is constant for frequencies under fc and then is decreasing with a 1/f² slope)
52
then is decreasing with a 1/f² slope) - flicker noise or 1/f noise (origin still under investigation)
The Noise Figure (NF) gives the deterioration of th e signal on noise ratio between input and output
n two port cascade : Friis Theorem
321
1 1 2 1 2 1
1 11...
...n
totn
F FFF F
G G G G G G −
− −−= + + + +
Noiselesstwo port network
VS
ZS
eSn
en
inZL
Noisy two port network
Sn
n
Sn
outn
outn
out
Sn
in
P
P
PG
P
PPPP
NF +=⋅
== 1
Poutn
Pout
PSn
Pin
Pn
Two port network noise 2/2
Two port network noise modeling
Fmin, Rn, | Γopt | et arg( Γopt ) are the 4 noise parameters of the component. From these parameters,
the noise figure NF is expressed:
( )2
min 2 20
4
1 1
opt gn
opt g
RF F
Z
Γ − Γ⋅= + ⋅+ Γ ⋅ − Γ
Fmin: minimum noise figure
Rn: equivalent noise resistance (aperture of
N
N
53
NF minimization: the input of the two port network must be connected on the noise
optimal impedance
Because Γopt ≠ Γin* a trade-off between gain and noise figure have to be solved
Rn: equivalent noise resistance (aperture of
the noise curve)
Γopt : noise optimal reflection coefficient
Example of LNA design
Design of a LNA at 20 GHz with a BiCMOS 0.25 µm tech nology
1
4
7
10
13
0,1 1 10 100I (mA)
Fm
in /
Gai
n m
ax.
(dB
)
20
30
40
50
Rn
( Ω)
1
4
7
10
13
0,1 1 10 100I (mA)
Fm
in /
Gai
n m
ax.
(dB
)
20
30
40
50
Rn
( Ω)
1
4
7
10
13
0,1 1 10 100I (mA)
Fm
in /
Gai
n m
ax.
(dB
)
20
30
40
50
Rn
( Ω)
Noise parameters and gain for a SiGe HBT versus Ic
Input
Outputi i
54
Ic (mA) Fm inGain max.Rn
Ic (mA) Fm inGain max.Rn
Ic (mA) Fm inGain max.Rn
ΓΓΓΓopt
ΓΓΓΓin ib croissant
ib croissant
ΓΓΓΓopt
ΓΓΓΓin ib croissant
ib croissant
Γopt and Γin variations versus Ic
ΓΓΓΓoptΓΓΓΓin*Le croissante
ΓΓΓΓinLe croissante
ΓΓΓΓoptΓΓΓΓin*Le croissante
ΓΓΓΓinLe croissante
Γopt and Γin* variations versus the degeneration
inductor Le value
increasing
increasing
increasing
increasing
Amplifier linearity 1/4
Several measures exist for evaluating the linearity of an amplifier power performances
The compression point (the simplest)
Pout (dBm)Linear extrapolation
1dB
Pout-1dB
Energy conservation:
PoutPin
Pth
P
Linearity � Sophisticated Modulation Techniques � Spectral efficiency
55
Pin (dBm)
Linear Region Compression Saturation
Slope=1
Pin-1dB
Pout-1dB= 10. Log (Glin.Pin-1dB) - 1
Pth = Pdc + Pin – Pout = Pdc – Pin (G – 1)
When Pe is increasing then Pth increases as well. This can be done only if G is decreasing
Pdc
AM/PM Conversion
When changes in the amplitude of a signal applied to a non-linearity cause a phase shift.
Particularly a problem for power amplifier used in communication systems based on phase-modulated signals (as QPSK …)
Amplifier linearity 2/4
At a circuit output, P out can be expressed versus the input P in as follows (1 st degree approximation):
Pout = A.Pin + B.Pin2 + C.Pin
3 + ....
Pin1 = P1.sin (ω1t)If two signals are applied: Pin = Pin1 + Pin2 with
Pin2 = P2.sin (ω2t)
Then Pout = A.(Pin1 + Pin2) + B.(Pin1 + Pin2)2 + C.(Pin1 + Pin2)
3 + ...
And developing:
2 3
56
Pout = A.Pin1 + B.Pin12 + C.Pin1
3 + .... (output for excitation 1)
+ A.Pin2 + B.Pin22 + C.Pin2
3 + ... (output for excitation 2)
+ 2B.Pin1.Pin2 + 3C.Pin12.Pin2 + 3C.Pin1.Pin2
2 + ... + K.Pin1m.Pin2
n + ... (cross modulations)
Mixing products lead to intermodulation signals which order is |mf1 ± nf2|, with m et n algebraic.
3rd order intermodulation (the more annoying because the closest of the carriers)
3C.Pin12.Pin2 � 3C.P1.sin
2 (ω1t).P2.sin (ω2t)
� .P1.P2.cos (2. ω1t). sin (ω2t)
� .P1.P2.[sin [(2. ω1+ω2)t]. sin [(ω2-2.ω1)t]]
23C
43C
Amplifier linearity 3/4
o
o
Pout
Freq
ω1 ω2
2ω1- ω2 2ω2- ω1ω2- ω1
2ω1 2ω2
ω2+ω1
3ω1 3ω2
2ω1+ ω22ω2+ ω1
Spectral illustration
57
P i i . P1 i 1 OIP iP2 2P1 OIP2P3 3 P1 2OIP 3
i
Slope=1
Slope=2 Slope=3
o
o
Intermodulation level IMDi or C/Ii (dBc)
Ratio between the power of the carrier and the power of the ithintermodulation product, given for an input power level.
Decreases when Pin is increasing.
Ex. IMD2 = P1 – P2 et IMD3 = P1 – P3
Interception Point (dBm)Power characteristics
Amplifier linearity 4/4
Adjacent Channel Power/Leakage Ratio (ACPR or ACLR) , expressed in dBcThis parameter quantifies the intermodulation when a complex signal is treated by a real amplifier. It is the ratio between the power in the main channel and the power of spurious generated in adjacent channel.
( )
( ) ( )
2
1
64
3 5
2
10 log
f
f
ffdBc
f f
Dsp f df
ACPR
Dsp f df Dsp f df
= ⋅ +
∫
∫ ∫
Linearity measures for complex signals
Main Main Adjacent Adjacent
58
Noise Power Ratio (NPR) en dBcWhite noise is used to simulate the presence of many carriers of random amplitude and phase, passed through a narrow band-reject filter to produce a deep notch (typ. >50dB) at the center. The depth of the notch at the output of the amplifier is the measure of the NPR (MD products tend to fill in the notch).
Main channel
Main channel
Adjacent channel
Adjacent channel
Main channel
Main channel
Adjacent channel
Adjacent channel
Amplifier dynamics, power efficiency
Dynamics
It is the ratio between the output power Pd1when theIM3 level equals the noise floor output power and the noise floor output power PN (the minimum output detectable power).
Power efficiency
Energy conservation:
Pth + Pout= Pdc + Pin
Efficiency :
In case of high power applications, the PowerAdded Efficiency (PAE) is preferred:
dc
out
P
P=η
PP −o
59
The efficiency must be maximum for:
-A longer battery lifetime (mobile terminals)
-Thermal management (lowering the thermaldissipation from HPA, satellites, base telecomstations, etc…)
dc
inout
PAE P
PP −=ηD dB Pd1 dBm PN dBm
in
Slope =1
Slope = 3Dynamics
Noise floor
Power amplifier operating class 1/4
The operating class (A, B, C…) is a function of the bias point location via the conduction angle Φ
Class A
60
Classes B and C
As the conduction angle Φ is decreasing the power efficiency is increasing.A maximum near 100% can be theoretically obtained with Φ = 0 but gain and power will be near 0
Power amplifier operating class 2/4
Classes D and E
The source signal is not sinusoidal (near a square signal) � power transistors are commuting
Class D ���� 2 transistors
Theoretical efficiency of 100% But, the transistor is commuting during some time and dissipates power because I and U are simultaneously non null.
Operation under 1GHz;
High power amplifiers (1kW) +Vdd
LModulation
Voltage Current
Power dissipation whenI ≠ 0 and U ≠ 0
61
-Vdd
RLC
LModulation
Class E ���� 1 transistor
Target: optimize wave forms to be better than the class D
� Rise / fall times of currents are shifted compared with voltagesThis results in a lower power dissipation during commutation
Theoretical efficiency of 100% but some limitations remain:- The non-null Ron resistance- The non-null saturation voltage- Losses into passives
+Vdd
RLCp
C0L0L
Power dissipation lower than the class D
Power amplifier operating class 3/4
Z = ∞ @ 3f00 elsewhere
Class F and variantsThese classes use harmonic tuning of their output networks for combining these harmonics with the fundamental. This achieves higher efficiency and can be considered a subset of Class C due to their conduction angle characteristics.
62
Z = ∞ @ f00 elsewhere
Power amplifier operating class 4/4
Summary
ClassTransistoroperation
Conduction Angle θ [rad]
Output powerEfficiency
max.[%]
Gain Linearity
ACurrentSource
2π medium 50 good good
B π medium 78,5 medium medium
C 0 < Θ < π low 100 low low
D
commutation
π good 100 low low
E π good 100 low low
F π good 100 medium low
63
A trade-off between efficiency and linearity is alw ays to be solved
Power Efficiency => Switching PA’s (class D, E, F)Linearity => Class A, AB, B
These important performances for a power amplifier can be optimized by specific circuits and technique s,
Circuits for efficiency optimization
Circuits for linearity optimization
Techniques for high output powers
Pout (dBm)
Pin (dBm)
Pin-1dB
η
PA- Efficiency increase
Doherty amplifier
RFInput
Output
Powercontrol
Line
Doherty amplifier
Typicalamplifier
64
Main amplifier PA1 : biased for class AB or B
Auxiliary amplifier PA2 : class C
� this amplifier enter into operation when the input signal reaches a fixed level (Poutmax / 9)
The efficiency has a good level on a large input power level range.
Line
PA- Efficiency and linearity increase
Envelope Elimination and Restoration Amplifier (EER ) or Kahn amplifier
The amplitude envelope and the phase information are processed by 2 different high efficiency amplifiers (Class C, D, E, …)
Problem: propagation times must be adjusted (equal) to be able to restore the envelope of the output signal.
PWM: Pulse Width Modulation
65
Bias adaptative Amplifier
The bias is driven by the envelope
The amplifier stays biased near the saturation, where the efficiency is the best
The bias is applied from the envelope requirement, the linearity is optimized as well
PA- Linearity enhancement 1/4
Push-pull Amplifier Balanced Amplifier
66
Passive couplers are cumbersome:
- monolithic integrated applications in millimeterwave frequency range, low output power (because losses of couplers)
- Hybrid technology for high output power applications
Several topologies exist for couplers as: Marchand coupler, branchline hybrid, rat-race hybrid,Wilkinson coupler, Lange coupler with λg/4 on a channel for 180° phase difference …
Feedback
Used for low RF frequencies (f< 1GHz) because this principle needs transistors with high open loop gain value to be efficient in the close loop operation.
Potential problems of stability
PA- Linearity enhancement 2/4
Analog Predistortion
The aim is to connect in front of the PA a device which presents the opposite non-linear characteristics, as the overall exhibits a linear transfer.
Close loop analog Predistortion:
The most general problem is to choose F1 and F2 such that F2(H(F1(x))) is a linear function of the input variable x.
F1(x) H(x) F2(x)x
Open loop analog Predistortion:
67
Close loop digital Predistortion
PA- Linearity enhancement 3/4
68
Feed-forward
Open loop operation:- Frequency broadband- Unconditionally stable
Difficult design but nice results:� Linearity very high enhancement (levels ofspurious can be – 60 dBc)
Drawback: low efficiency, 10 % max.
+
-
Various other circuits exist…
Like LINC amplifiers (LInear amplification using Non -linear Components)
Balun (180° hybrid)
PA- Linearity enhancement 4/4
69
Outphasing Technique which consists in the transformation of the phase and amplitude modulated input signal into two phase modulated signals. Difficulty is in the realization of the AM/PM converter.
Resultant signals are with constant envelopeAmplifiers operate at their maximum efficiency (near saturation)Outputs are out of phase recombined (the envelope is restored)
Conclusion:The main difficulty is to improve the linearity without lowering
to much the efficiency
Network of amplifiers with Wilkinson couplers
Bus -bar interconnection
PA- Power increase
70
Bus -bar interconnection
Two amplifiers on a bar
The dimension between two amplifiers must be small compared to λg (powers must be in-phase combined on the output)
Stubs and LC for matching (which can be distributed
The aim : optimizing the nonlinearity operation for maximizing the frequency conversion.
A large amplitude signal is requested (see slide “Linear and Non-Linear operation” ).
Non-linearity : vout = A.vin + B.vin2 + C.vin3 + ....
Frequency conversion: multiplication and mixing
� If only one signal is applied on the input: vin = V.sin (ωt)
Then
f 2f 3f
� FREQUENCY MULTIPLICATIONv = V .sin (ω t)
( ) ( )[ ] ( ) ( )[ ] ...t3sintsin3.4
V.Ct2cos1.
2V
.Btsin.V.Av32
out +ω−ω+ω−+ω=
71
vin1 = V1.sin (ω1t)� If two signals are applied: vin = vin1 + vin2 with
vin2 = V2.sin (ω2t)Then (see slide 54 on intermodulation)
vout = A.vin1 + B.vin12 + C.vin1
3 + .... (output for excitation 1)
+ A.vin2 + B.vin22 + C.vin2
3 + ... (output for excitation 2)
+ 2B.vin1.vin2 + 3C.vin12.vin2 + 3C.vin1.vin2
2 + ... + K.vin1m.vin2
n + ... (cross modulations)
� B.V1.V2.{ cos[(ω1-ω2)t] - cos[(ω1+ω2)t]}Two frequencies are generated: difference (f1 - f2) and sum (f1 +f2) � MIXINGThese frequencies are called Intermediate Frequency (I.F)
Frequency conversion: non-linear device
A: PN-diode and bipolar transistor(non-linear conductance and transconductance)
Well suited for multiplication (high order, n>2)
B: Schottky diode or Field Effect Transistor(non-linear conductance and transconductance)
X
Y
0102030405060
0 1 2 3 4
A
B
−
β= 1Uv
exp.i.iT
beboc
2v
72
Other diodes
(non-linear capacitance)
Some diodes can be used as variable capacitance (varactor) when reverse biased: for example Schottky diode and Step Recovery Diode (SRD).
Schottky diode: with 0,5 < γ < 2
Well suited for mixing and multiplication by 2
2
T
gsdssd V
v1.Ii
−=
γ
Φ−
=
B
a
0ja
V1
C)V(C
0-1 -0.5 -0.25-0.75
Applied voltage
Cap
acita
nce
(pF
)
Noise and noise conversion
v t V 0 t cos 0 t t
Near the carrier� The BF noise is converted by the non-linearities of the device: converted noise
RF Signal+ HF noise
- BF Noise sources- HF white noise
Amplified RF signal+ HF additive noise
+ BF noise modulationconverted noise
Amplitudenoise ε(t)
Phase noise Φ(t)
HF DeviceEx. amplifier
Frequency conversion: noise issue 1/2
noise
AM noise
PM noise
73
BF noise HF noise
Additive noise
Converted noise
HF noise
Additive noise
Converted noise
(1/f noise and trapping/release noise, if this last noise is present)
Far from the carrier (HF Noise)� white noise which a noise floor. Two situations are possible:
additive noise floor converted noise flloor(thermal noise, …) (BF thermal noise conversion)
Modulation of the BF noise floor by the fundamental signal :
� Noise and signal (f0) at the device input
� Modulation of the BF noise by the signal (because device non-linearities)
� Spectral aliasing of noise
Output signal (f0 signal and converted noiseadded with HF noise)
Frequency conversion: noise issue 2/2
74
added with HF noise)
Modulation of the BF noise floor by harmonics gener ated by non-linearities of the device
Near carrier noise deterioration of a n order multi plier output
Multiplier of n order � multiplication by n of the noise level present at the output
This noise deterioration is measured with ∆CNR (Carrier to Noise Ratio): CNR 20log n
General example of a varactor diode multiplierThe diode is used as a variable capacitance (varactor) versus the applied voltage (the diode is reverse biased)
- When the signal (high amplitude) is applied � the impedance variations generate harmonics- Principle: the circuit is optimized for an order n harmonic amplitude as high as possible and for suppressing all others, which must not be found on the load (non-linearity + filtering)
Frequency conversion: diode multiplier 1/4
75
Main characteristics of this topology- The capacitance is the main non-linear element � reactive component � low noise and low conversion losses (no resistive divider lines/non-linearity)- Narrow band because the reactive nature of the non-linearity- Multipliers with frequency up to 150 GHz can be designed with Schottky diodes used as varactor
SRD diode Multiplieur The characteristic C(V) is highly non-linear � high order multipliers
General example of circuit
- Input band-pass filter � impedance matching for f0 , zout = 0 for all other frequencies (harmonics must not disturb the source)- diode and inductor Le � synthesizing a pulse generator- output resonant circuit � centered on the nth harmonic , output impedance matching @ frequency n.f0
Frequency conversion: diode multiplier 2/4
76
Main characteristics of this topology- The efficiency of the frequency conversion is varying with 1/n.- Applications up to 20 GHz.
Resistive diode MultiplierThe diode (PN or Schottky) is forward biasedLimitation if n > 2 because the frequency conversion efficiency decreases a lot as n increases
General example of circuitInput band-pass filters (output) used as resonators
� impedance matching @ f0 (2 f0)� zin (zout) = 0 for all other frequencies
Input: the source is loaded by the diode and its series resistance, the cathode is connected to ground via the output resonator (all the source voltage is applied on the diode).
Frequency conversion: diode multiplier 3/4
77
Output: the power is provided to the load by the diode with its anode connected to ground (all the diode voltage is transferred to the load).
Main characteristics of this topology- Broad-band frequency conversion - Applications beyond 100 GHz
Balanced Multipliers- the topology rejects naturally some intermodulation products (the power is less scattered)- the output power is higher- Input and output impedances of the circuit are higher (x2, generally)
Frequency multiplier with even order n
2 parallel diodes connected in series
Even harmonics are kept after the outputtransformer (180° passive coupler)
Well suited for frequency doubler.
Frequency conversion: diode multiplier 4/4
78
Frequency multiplier with odd order n
2 anti-parallel diodes
Input band-pass filter centered on f0Stub λg/4 (3f0) for output matching (the CC at the endof the input filter is changed into CO @ 3f0 )
Couple line output filter centered @3f0, Zin �∞ @ f0
Well suited for frequency doubler.
Advantages when compared to diode circuits
- Conversion gain - Good efficiency (transistor biased in class B or C)- Lower input signal amplitude (amplification) - High output power - no stability problems
Drawbacks
- High 1/f noise (FET)� increase upper than 20.log(n)
Simple multiplier (TBH SiGe / HEMTs GaAs)
Class B or C amplifier loaded on a resonator centered on the nth harmonic
Zload = RL @ n.f0
Frequency conversion: transistor multiplier 1/2
79
Zload = RL @ n.f00 elsewhere
Simple multiplier with FET
Input: λg/4 (f0) stub with a SC termination for MESFET biasing � SC @ 2f0Output: half-wave distributed filter. Several line sections which are λg/4 @ f0 (rejection), λg/2 @ 2f0
(transparent) and 3λg /4 @ 3f0 (rejection)
Frequency conversion: transistor multiplier 2/2
80
FET balanced multiplier (see diode balanced multiplier )
Frequency doubler based on push-push topology:
- odd harmonics naturally cancelled
-Even harmonics in-phase recombined: gain
-Zout divided by 2 : impedance matching easier
Multiplier Multiplicationorder
Band-width
Output power
Stability efficiency Frequency conversion
Noise Max. Fréquency
varactor
Any order low high critical
high
Low loss low
> 100 GHz
SRD diode Medium to high
(high order)< 20 GHz
dioderesistive
2 very large low good low loss medium
100 GHzbalanced(diode
Depends on topology
very large medium good mediumLow loss
(/2)medium
Frequency conversion: conclusion on multipliers
81
(dioderesistive)
topologyvery large medium good medium
(/2)medium
transistorsimple
2 and 3
large
high
good good
gain
medium > 100 GHztransistorbalanced
2 (push-push)3 (other
topology)
Very high (x2)
High gain (x2)
Main difficulty for matching and sometimes stability because, in a circuit, a lot of impedances are time-varying
Input signal spectrum Output signal spectrum
Idealmultiplier
Aim : to convert a signal spectrum which is in a RF frequency band (fRF) toward any other frequency band (fIF) called Intermediate Frequency. This conversion is done mixing the initial fRFfrequency with the frequency of a signal generated by a Local Oscillator (fLO).
As already seen two IF are present at the mixer output: fRF + fLO and |fRF – fLO|
� up-conversion : fRF + fOL (transmitter)� down-conversion: |fRF – fOL| (receiver)
Frequency conversion: Mixing 1/3
82
Frequency translation toward any other frequency results from the multiplication of the two signal RF and LO. A non-linearity is required, which will be driven by the large LO signal (“LO pumping”)
This translation can be done by:- multiplier - modulator- mixer
For frequency conversion we need a non-linearity : xout = A.xin + B.xin2 + C.xin3 + ....
Mixer model where xRF(t) and xOL(t) are the input signals
If sinusoidal signals are applied, xRF(t) = VRFcos(ωRF t) and xLO(t) = VLOcos(ωLO t)
1st non-linearity order: f et f
Frequency conversion: Mixing 2/3
( ) ( )( )( ) ....xxx4xx6xx4xD
xxx3xx3xC
xxx2xBxxAx
4LOLO
3RF
2LO
2RF
3LORF
4RF
3LOLO
2RF
2LORF
3RF
2LOLORF
2RFLORFIF
++⋅+⋅+⋅++
+⋅+⋅++
+⋅+++=
( ) ( )tcosAVtcosAVx ω+ω=
83
Useful output signals(produced by the multiplication)
3rd non-linearity order:
3fOL, 3fRF,
2fRF± fOL,
2fOL± fRF
fOL and fRF
2nd non-linearity order:
2fOL, 2fRF,
|fRF± fOL|
1st non-linearity order: fOL et fRF( ) ( )tcosAVtcosAVx LOLORFRFIF ω+ω=
( ) ( ) ( )( )[ ] ( )[ ]tcosVBVtcosVBV
t2cosV2B
t2cosV2B
VV2B
LORFLORFLORFLORF
LO2LORF
2RF
2LO
2RF
ω+ω+ω−ω+
ω+ω+++
( ) ( )
( )[ ] ( )[ ]
( )[ ] ( )[ ]
( ) ( ) ( ) ( ) ...tcosVVV4C3
tcosVVV4C3
t2cosVV4C3
t2cosVV4C3
t2cosVV4C3
t2cosVV4C3
t3cosV4C
t3cosV4C
LO3LOLO
2RFRF
2LORF
3RF
LORF2LORFLORF
2LORF
LORFLO2RFLORFLO
2RF
LO3LORF
3RF
+ω++ω++
ω+ω+ω+ω−+
ω+ω+ω−ω+
ω+ω+
Image Frequency f imThis frequency is without any interest and is converted in the fFI band, just like fRF � This conversion increases the noise level.
Frequency conversion: Mixing 3/3
Image spurious
Useful signal
From previous slide:
�even degrees into polynomial produce intermodulation products of even order
�odd degrees into polynomial produce intermodulation products of odd order
84
Solution : image rejection before the mixing
If f im is too much close of fRF for a good filtering (high Qfilter often required), special mixer topologies must be used, as topology of Hartley (called Single Side Band –SSB- mixer.
f im 2 f OL f RF
FI filter
RF input
FI output
Conversion gain saturation
Conversion Gain
Ratio between the power of the output signal at IF frequency PFI(fFI) and the power of the input signal at RF frequency PRF(fRF). The IF signal is at frequency |fRF – fOL| or fRF + fOL.
1st approximation:
Because: x FI t ... B V RF V OL cos RF OL t B V RF V OL cos RF OL t
Gc POL
Frequency conversion: Mixer characteristics 1/4
Gc ,dispP FI f FIP RF , disp
85
The conversion RF/FI will compress because the 4th order of the non-linearity
���� a compression point can be defined (like for amplifiers)
(Note: a compression will be produced as well by the
increase of the amplitude of the OL signal –Gc can
not increase endlessly-. So, there is an optimum
where Gc is maximum)
x FI t ...3D4
V OL V RF3 V RF V OL
3 cos RF OL t ...PFI (fFI) [dBm]
PRF (fRF) [dBm]
LinearRegion
Compression Saturation
Linear extrapolation
Slope=1
1dB
Pout-1dB
Pin-1dB
Frequency conversion: Mixer characteristics 2/4
FI band Center
FI SpectrumSFI (f)
Intermodulation
Two RF signals are applied with fRF ± δBecause the 4th term of the non-linearity:
The output spectrum in the FI frequency band is:
B V RF V OL+
x FI t ...3D4
V OL V RF3 V RF V OL
3 cos RF OL t ...
86
And the following characteristics can be defined:
C/I3Output interception point of intermodulation OIP3
(here as well, as defined for amplifiers)
P3 3 P1 2OIP 3Slope=1
Slope=2 Slope=3
or
A mixer can be considered as an amplifier (two port network) with the input at RF frequency and the
output at IF frequency
Noise
The mixer is a two port network with RF input and IF output �
and
Single Side Band Noise Factor
No useful signal in the IM frequency band (just noise)
Friis Theorem is valid and can apply
Frequency conversion: Mixer characteristics 3/4
N k T G B k T G B
IF
IF
RF
RF
N
S
N
S
P
PP
P
F =
Na = output noise part of the mixer
87
Double Side Band Noise Factor
Useful signals in the two RF and IM bands.
If we place an image rejection filter in front of the mixer, this difference of 3 dB between SSB noisefactor and DSB one is canceled.
So, assuming Bim = BRF , a general relationship can be expressed as:
F SSBN a k T 0G c , f im Bim k T 0Gc , f RF BRF
k T 0G c , f RF BRF
F DSBN a k T 0 Gc , f im B im k T 0G c , f RF BRF
k T 0G c , f im Bim k T 0 Gc , f RF BRF
F SSB F DSB 1G c , f imG c , f RF
Na = output noise part of the mixerGc(fim) = conversion gains for image frequency fimGc(fRF) = conversion gain for fRFBim , BRF = bandwidth around fim and fRF, respectivelyT = system reference temperature (290 K)
Considering Bim = BRF : FDSB = FSSB / 2
Isolations
Isolations characterize the mixer ability to prevent the transmission of the frequency applied on one of the accesses forward all others.
For example, on the IF output, only the signal at (fOL + fRF), for an up-converter, or at | fOL - fRF |, for a down converter, must be present.
A mixer is a three accesses device. So we can define:
- OL � RF isolation I OL RFP RF f OLP f
The main isolation issue, because:
Frequency conversion: Mixer characteristics 4/4
88
- OL � RF isolation
- RF � FI isolation
- OL � Fl isolation
I RF FIPFI f RFPRF f RF
I OL FIPFI f OLPOL f OL
I OL RF POL f OLThe main isolation issue, because:
- OL is the highest level
- The self-mixing of the OL generates DC
offsets which translate to self-biasings in 0
IF systems
Passive mixer
They are designed from diodes or from “cold” FETs with Vds ≈ 0V (�Ids ≈ 0 mA).
Their current characteristics are:
- A good linearity for RF signal - A low power consumption - A lossy conversion
Simple resistive diode mixer
- A coupler is required on the input to be able to apply both OL and RF signals - Output OL filter for applying all OL power to the diode (without, this power is
Frequency conversion: passive mixers 1/2
89
- Output OL filter for applying all OL power to the diode (without, this power is shared between the diode and the load)- The operation is modulator-like:
- positive OL amplitude � the diode is on � high conductance
- negative OL amplitude � the diode is off � very low conductance
Simple reactive diode mixer
- Based on the use of a varactor diode is
-Same previous requirement for an RF and OL input coupler, and for an output OL filter - Mixing is generated by impedance variations (imaginary part of the impedance)
Frequency conversion: passive mixers 2/2
Simple resistive series transistor mixer
-No coupler requirement (3 accesses for a transistor)
-Cold FET (no bias on drain) : the transistor acts as a controlled resistor
-Pumping OL signal on gate
- VDS = 0V : this condition is kept with CC at fOL on drain and source- CC for fRF on drain: all the RF power is applied between source and drain
- CC for fFI on source: all the IF power is transferred to the load
- Non-linearity: conductance gDS
DS
90
Simple parallel resistive transistor mixer
-Cold FET (no bias on drain): the transistor acts as a controlled resistor
-Pumping OL signal on gate
-Non-linearities:
conductance gDS (the main): VDS = 0V kept with CC at fOL on drain
capacitances Cgs and Cgd: CC at fRF on gate (no VGS(fRF) variations)
-Conversion loss is minimized for an amplitude of the LO signal in the range [Vp ; VGSmax] [pinch-off voltage, voltage for gate in conduction]
Mixer with LO on drain
- Non-linearities:
transconductance gm (the main): its swing is maximum if the transistoris biased in ohmic region (VDS < VDSsat) and CC at fOL on gatefor vGS (t) = VGS0 = 0V
conductance gds and capacitance Cds-LO power is higher than the one of the “OL on gate” topology
Frequency conversion: active mixers 1/2
Active mixers
Designed from transistors only: bipolar (TBH) or FET (MESFET, HEMT, P-HEMT)
gmmaxgdsmin
gmmingdsmax
91
-A coupler is required on drain to be able to apply OL and retrieve FI
Mixer with two transistors or double-gate transisto r(similar to the mixer with LO on drain)
-Main non-linearity: transconductance gm (T2)T2 = common-drain ampli. for OL (CC at fOL on T2 drain)T2 = common-gate ampli. for FI (CC at fFI on T2 gate)
-Advantages of this topology:� the required LO power is highly decreased� good isolation OL/RF (low value of Cgd)� no coupler required
-Drawback: the conversion gain is quite low because the poor transfer of IF signal from T1 drain to the output (no matching between transistors)
Frequency conversion: active mixers 2/2
Mixer with LO on gate
- Non-linearities:
transconductance gm (the main): VDS0 is kept withCC at fOL on drain (VDS0 > VDSsat)
capacitance Cgs- Conversion gain is maximized from a OL voltage
swing within the range [Vp ; VGSmax]
- A coupler is required on the input to be able to apply both OL and RF signals
92
Mixer with LO on source -Non-linearities:transconductance gm (the main): pompage par VGS et VDSothers: gds, Cgs et Cds
Same characteristics as for mixer with LO on gate, but no coupler required
CC at fOL on drain for an optimal pumping
CC at fRF and fFI on source for cancelling feed-backs (stability problems, lower conversion gain)
A lot of mixing products are present at the output of a single non-linearity based mixer�implementing a filter is useful when spurious are far enough, but it can be also useless, because some spurious products can be in the IF frequency band.
The solution is to combine several single mixers, in a balanced topology
Simply balanced mixer for RF signal
2 single mixers, 2 couplers (RF & FI)
Simply balanced mixer for OL signal
2 single mixers, 2 couplers (OL & FI)
Frequency conversion: balanced mixers 1/3
93
s2 1 A x RF xOL B xRF2 2x RF xOL xOL
2
C xRF3 3x RF xOL
2 3x RF2 xOL xOL
3 ... k i x RFm xOL
n ...
xFI s2 s1 2A x RF 4BxRF xOL ...
2C xOL3 3xRF xOL
2 ... k i xRFm xOL
n k i xRFm xOL
n ...
This topology rejects:
�OL frequency and its harmonics
�all terms resulting from an even power of RF
This topology rejects:
�RF frequency and its harmonics
�all terms resulting from an even power of OL
Same mathematical developments
Frequency conversion: balanced mixers 2/3
Double balanced mixer
4 single mixers, 3 couplers (OL & RF & FI)
94
x FI 8B xRF xOL ... k i x RFm xOL
n k i x RFm xOL
n ...
�This topology combines all the rejections of the previous ones
�Only intermodulation products resulting from odd powers of signals RF or OL remain
Advantages: filtering is largely simplified, isolations are greatly enhanced, as gain and linearity
Drawback: large complexity and coupler requirement
�TRADE-OFF between rejection and circuit complexity
Balanced Mixers: summary
Characteristics
Mixer classes
Single cellSimply
balanced (RF)
Simply balanced
(OL)
Double balanced
OL signal harmonics rejection all even all
RF signal harmonics rejection even all all
Frequency conversion: balanced mixers 3/3
95
Rejection of m.fRF ± n.fOL
m even
n even
Number of non-linearities 1 2 4
Conversion gain(assuming couplers without any loss)
Gc Gc + 3 dB Gc + 6 dB
Normalized consumption 1 X2 (minimum) X4 (minimum)
Number of required couplers 0 2 3
Double balanced mixer
The RF signal is applied as a common mode through the output transformer (FI)
At microwave frequencies, transformers are replaced by couplers (power dividers or combiners, passive or active) 180° :
- Example of Ratrace coupler
- Example of Branchline coupler
Frequency conversion: examples of balanced mixers 1/ 2
96(source = www.microwaves101.com)
« Cold FET » double balanced mixer
Diodes are replaced by FET without any bias on drain (VDS = 0, IDS = 0)
This principle can not be used with bipolar transistors
Double balanced mixer, if 3 couplers are implemented
The linearity of this topology is very good
Gilbert mixer
T1 & T2 = differential pair for a conversion voltage/current (linear transconductor stage)
T to T = transistors operating into commutation
Frequency conversion: examples of balanced mixers 2/ 2
97
T3 to T6 = transistors operating into commutation (mixing stage)
Conversion current / voltage into loads RcThis circuit is really popular because it is a nice solution for integration. But performances are quite limited (because trade-off between gain, linearity and noise) and low voltage application is difficult.
if VRF and VOL
Mixer principle
Non-linearity Gc Required POL OIP3 Noise figureDC
consumptionNumber of couplers
Passive single mixer
diode loss medium low bad Very low 1
Series transistor
loss high medium medium Very low none
Parallel transistor
loss high good mediumVery low
1
OL on gate good low medium good high1
OL on drain good high medium good low
Frequency conversion: Mixers summary
98
Active single mixer
1OL on drain good high medium good low
OL on source good medium medium good mediumnone
double gate medium low medium medium medium
Double balanced
mixer
Gilbert Cell good low medium medium medium3
Cold FETs loss medium Very good medium Very low
Frequency generation� Fixed frequency oscillators (ex. DCXO, DRO)
reference frequency in a systemdielectric resonators
(ceramic, sapphire, quartz)Very high Q (Q0 up to 109)well stabilized and low phase noise
� Synchronized oscillators
between PLL et and oscillator
� Tunable oscillators (VCO)
For frequency synthesis
Frequency generation
99
For frequency synthesis Low Q (Q0 = 102 maximum)frequency can vary
when integrated, resonator LC, with C = varactor
� Frequency synthesizer
PLL or DDS (Digital Direct Synthesis)
DCXO = Digitally Controled Crystal (abr. Xtal) Oscillator= frequency reference (quartz oscillator)
VCO = Voltage Controlled Oscillator
PLL = Phase Locked Loop
4 La génération de fréquences4.2 Architectures d’oscillateurs
Circuits électroniquesoscillants
oscillateurs àtemps discrèt
oscillateurs àtemps continu
à résonateurs
- à Quartz- à circuit LC- circuits à résonateurs diélectriques
sans résonateurs
- oscillateurs en anneaux- à cellules RC
circuitsnumériques(DDS, ...)
oscillateursà relaxation
100
- à circuit LC- circuits à résonateurs diélectriques
- à cellules RC (DDS, ...)
exploités de la BF jusqu'aux fréquences RF (qlq GHz)La limite HF � circuits numériques nécessitant une horloge très supérieure à la fréquence max. synthétisable.
régime saturé/bloqué �applications BFSignaux de sortie carrés (bcp d’harmoniques)Résonateurs = cellules à bande étroite
� génération de signaux quasi-sinusoïdaux
Technique de réalisation dépendante de la technologie du résonateur (diélectrique, quartz, circuit passifs distribués ou localisés, etc...)
� Définir conditions de démarrage etd’oscillation (voir en suivant)
4 La génération de fréquences4.3 Conditions de démarrage et d’oscillations 1/2
Oscillateurs à temps continu et à résonateurConversion d’une puissance continue fournie par l'alimentation en une puissance à une fréquence particulière ≠ 0
� système bouclé sur lui-même constitué :
- d’un élément passif résonant Q- d'un amplificateur A régénérant le signal créé à la fréquence f0
dissipée par le circuit résonant
ΓAΓQ
a a
Conditions d'oscillation, (conditions de Barkhausen )Formalisme des impédances avec
RA 0 RQ 0 0
X X 0
Z A RA j X AZ R j X
101
Plan d'oscillation
ZQ ZA
bQ
aQ
bA
aA
Formalisme des coefficients de réflexion
X A 0 X Q 0 0 ZQ RQ j X Q
A 0 . Q 0 1
A 0 Q 0 0 2k k
Conditions de démarrage
RA 0 RQ 0 0
X A 0 X Q 0 0A 0 . Q 0 1
A 0 Q 0 0 2k k
ou bien
! Zc Z A Z QPour appliquer correctement le formalisme des coefficients de réflexionl’impédance de normalisation Zc doit satisfaire à la condition :
4 La génération de fréquences4.3 Conditions de démarrage et d’oscillations 2/2
Oscillateur en mode de transmission ou topologie pa rallèle
A Sortieω0 = pulsation où les conditions sont énoncées
Conditions de démarrage
fonctionnement quasi-linéaire de l’amplificateur
Conditions d’oscillation
compression de l’amplificateur
Exemple
� non-linéarité d’ordre 3 < 0 nécessaire pour diminuer le gain lorsque la puissance augmente
102
Plan d'oscillation
A
Q
Sortie
Plan d'oscillation
A
Q
SortieS21A 0 . S21Q 0 1
21A 0 21Q 0 0 2k k
Oscillateur en mode de réflexion ou topologie série
ω0 = pulsation où les conditions sont énoncées
S11A 0 . S 11Q 0 1
11A 0 11Q 0 0 2k k
ω0 = pulsation où les conditions sont énoncées
4 La génération de fréquences4.4 Caractéristiques électriques 1/3
� Fréquence d'oscillation = fréquence de la raie fondamentale
� Puissance de sortie du signal
� Accordabilité en fréquencePour les VCO. Dépend de la technologie du résonateur (Quartz, diélectrique, circuit LC, etc...).
� Pureté spectrale = Niveaux des harmoniques par rapport au fondamental (l’oscillateur parfaitement sinusoïdal n'existe pas)
� Coefficient de pulling = variation relative de f0 / variation de la valeur de l'impédance de charge(minimisé en isolant la sortie de l’oscillateur de la charge : isolateur, atténuateur, étage tampon)
103
� Coefficient de pushing = fluctuations de f0 / la tension d'alimentationl’alimentation change les caractéristiques du transistor et donc la fréquence où les conditions d’oscillations sont respectées
K pushf 0
V dcexprimé en Hz / V
Technique de mesure :On place successivement un CC et un CO sur la sortie en mesurant f0 pour chaque configuration. On trouve
K pull f 0 CC f 0 CO
Etude grand signal de l’oscillateur
ϕ
PsPe
k.Ps
Posc
0
P(mW)
Pe(mW)
Ps-Pe
PsatPsopt
Peopt
pertes (filtre, déphaseur …) considérées dans le coefficient kdéphaseur : phase de la boucle égale à 2.n.π
modélisation de la courbe Ps(Pe) :
Pe = k.Ps (pas de pertes dans la boucle) ⇒ Posc = Ps – Pe
⇒
⋅−−=sat
eosats P
PGexp1PP
104
⇒ les caractéristiques en puissance de l'oscillateur peuvent être données à partir des caractéristiques de l'amplificateur⇒ le tracé de Ps-Pe = Posc montre un optimum :
or
⇒ et
1Pd
Pd0
Pd
Pd
e
s
e
osc =⇔=
⋅−⋅=
⋅−⋅=sat
eo0
sat
eo
sat
0sat
e
s
P
PGexpG
P
PGexp
P
GP
Pd
Pd
0
0sateopt G
)Gln(PP ⋅=
−⋅=
0satsopt G
11PP
( ))Gln(
1G
P
PG
0
0
eopt
soptopt
−==0
0
0sateoptsoptmaxosc G
)Gln(
G
11PPPP −
−⋅=−=
( )1G)Gln(
P
Pk
0
0
sopt
eoptopt −
==
fBF
Bruit BF
f =
-10 dB/dec
Bruit BF converti (multiplicatif)
S(f)
f
ff
Lres(fm)
Bruit HF (additif)
-10 dB/dec
Bruit résiduelen sortie de l'amplificateur
Caractéristiqueen bruit BF de l'amplificateur
4 La génération de fréquences4.4 Caractéristiques électriques – le bruit dans les oscillateurs 2/3
Bruit en sortie d’un oscillateurModulation du bruit BF du composant actif transposé à la fréquence de sortie
Autour de la porteuse : bruit PM essentiellementbruit AM limité par la compression du gain de l'amplificateur
Modélisation : bruit de phase L(fm) autour de la porteuse fosc� fonction du facteur de bruit de l'amplificateur F� niveau de puissance du signal PR� coefficient de qualité en charge du résonateur QL
2F.k.TPe
S(f) = densité spectrale dubruit BF en tension en V2/Hz
105
fm =
fHF
Caractéristique en bruitde l'oscillateur prochede la porteuse
L(fm)
fBF
fHF
ffosc
fm
fBF
-20 dB/dec
-20 dB/dec
-30 dB/dec
Bruit HF
Bruit BF converti
2QL
fosc
modèle de Leeson-Cutler (1966)
L f m 10 log2F.kT
PR. 1
f osc2QL f m
2
. 1f HFf m
bruit = processus aléatoire et stationnaire (invariant dans le temps)
dBc/Hz
4 La génération de fréquences4.4 Caractéristiques électriques – le bruit dans les oscillateurs 3/3
Bruit en sortie d’un oscillateur : mesurePs
f0
DSP
ffm
L(fm)
RBW
PN.SSB
L f mP s
f mRBW
2
f mRBW
2
L f df .RBW
P sPN.SSB . RBW
L f m dBc Hz P s dBm PN.SSB dBm 10 log RBW
Incidence du bruit dans les systèmes
- Désensibilisation du récepteur par un signal -Désensibilisation du récepteur par l'émetteur
106
- Désensibilisation du récepteur par un signal provenant d'un canal voisin (Reciprocal mixing)
Bruit de phase de l’OL du récepteur
-Désensibilisation du récepteur par l'émetteur(systèmes full-duplex uniquement. ex. CDMA) ou le signalémis par un autre terminal à proximité (Noise desensitization)
f1f
Fort signal issude l'émetteur
f2
Faible signal reçupar le récepteur
signalindésirable
f1
signalà traiter
ff2fOL
f
FIindésirable
FIvoulue
Noise leakagethrough duplexer / antenna
Bruit de phase de l’OL de l’émetteur
4 La génération de fréquences4.5 Exemples de réalisations 1/4
Oscillateur à relaxation (temps discret)Circuit peu adapté aux appli. HF
Oscillateur à ligne à retardLigne à retard à cellules RF cascadées.0° < φ(E/S) < 270°oscille lorsque φ = 180° (conditions d’oscillation)
107
Oscillateur en anneauxTechnologies intégréesutilise le retard de propagation à travers une
porte logique pour déphaser le signal
La fréquence d’oscillation dépend :- de la technologie employée- du nombre de portes cascadées
Oscillateur à résonateur diélectriqueExemple d’oscillateur micro-ondes à topologie série
4 La génération de fréquences4.5 Exemples de réalisations – oscillateur Colpitts et ses variantes 2/4
Oscillateurs Colpitts, Hartley, Clapp, etc… basés su r des circuits résonants LCPrincipe de fonctionnement (Colpitts)
Oscillation = échange d’énergie entre L et C au rythme de la fréquence de résonance
L
C1 C2
L
C
i
i
i
iZC2.i- ZC1.i
Modification du réseau précédent en ajoutant une masse et un autre condensateur.
Charge de C1 � décharge de C2 et inversement : tensions aux bornes de chaque condensateur en opposition de phase à ω0
01
LC
1 1 1
108
01L
1C1
1C2
L
C1 C2
-A
Amplificateur inverseur pour compenser le déphasage introduit par le réseau LC1C2� Conditions d’oscillations
4 La génération de fréquences4.5 Exemples de réalisations – oscillateur Colpitts et ses variantes 3/4
Exemple d’oscillateur ColpittsUtilise ici un FET source-commune, mais on peut varier
01L
1C1
1C2
Rc
Vdd
L
C1 C2
Pland'oscillation
Circuitrésonant
T
Vdd
L
C2
R
T
C1
VddVdd
L
R
C2
C1
Vdd
Oscillateur de HartleyOscillateur de Clapp Oscillateur utilisant un quartz
Exemples avec des transistors bipolaires CC & BC
109
Rc
Vdd
L
C1 C2
Pland'oscillation
Circuitrésonant
C
Rc
Vdd
C
L1 L2
Pland'oscillation
Circuitrésonant
Oscillateur de HartleyCircuit dual de l’oscillateur Colpitts :transformation L � C
Oscillateur de ClappColpitts modifié en rajoutant une capacité C en série avec l’inductance L.
Facteur de qualité en charge plus élevé� meilleure stabilité en fréquence
Rc
Vdd
Quartz
C1 C2
Pland'oscillation
Circuitrésonant
Oscillateur utilisant un quartzVariante de l’oscillateur Clapp en remplaçant le réseau LC par un quartz : oscillateur Pierce
01C
1L1
1L20
1L
1C1
1C2
1C 3
4 La génération de fréquences4.5 Exemples de réalisations – oscillateur Colpitts et ses variantes 4/4
Oscillateurs équilibrésFort intérêt pour les circuits intégrés (transistors appairés, intégration, etc…)
Vdd
Out
VbiasTé depolarisation
Double paire croisée (Colpitts équilibré) Topologies push-push Colpitts à sortie f0 et 2f0
Résistancenégative
Résonateuraccordable
Lr
Vbias
Vtune
Vdd
Out Out
Lr
C2 C2
CvarCvar
RbRb
T2
Lc
Vdd
Out
Rc
T2
Lc
Out
Rc
Lb Lb
110
T2
Vdd
Vtune
T4
C1
Cvar
Le
Lee
T1
T3
C1
Cvar
Le
Lee
Lb Lb
- Circuit oscillant C1 Cvar Lb- Le = inductance de dégénérescence- Permet d’osciller à la fréquence double de celle fixée par le résonateur- Optimisation du facteur de qualité � faible bruit de phase
T2
C1
T2
C1
C2 C2
I0
T2
Vtune
C1
Cvar
T2
C1Cvar
Lb Lb
Résonateursaccordables autour de f0
Inconvénients :
- Résonateur non-isolé de la charge(coefficient de pulling…)
- petits transistors à utiliser pour limiter le temps de propagation de l’un à l’autre � bruit !