Communication protocol

in or betweenin or between

Computing systemsComputing systems

TelecommunicationsTelecommunications

Formats of digital messagesFormats of digital messages

Rules for exchanging

those messages

Rules for exchanging

those messages

Authentication

Signaling

Error detection and correction

Capabilities Describes

Syntax

Semantics

Synchronization

Interface

InteractionInteraction betweenbetween

Components

Devices

Systems

Programs

Computer vs user

…

Components

Devices

Systems

Programs

Computer vs user

…

At 2 levelsAt 2 levels

SoftwareSoftware

HardwareHardware

Pieces of Software

Pieces of Hardware

Pieces of Software

Pieces of Hardware I/O SystemI/O System

Pieces of Software

Pieces of Hardware

Pieces of Software

Pieces of Hardware

ProtocolProtocol

InterfaceInterface

Example: RS-232

MCUs +

Voltage

Level

shifter

MCUs +

Voltage

Level

shifter

RS-232

cable

RS-232

cable PCsPCs

RXRX RXRX

TXTX TXTX

Interface: 3-wire: Rx & Tx wires + GND wire

5-wire: Rx, Tx, RTS, DTS + GND

Interface: 3-wire: Rx & Tx wires + GND wire

5-wire: Rx, Tx, RTS, DTS + GND

Protocol:

- Voltage level: Logic ‘1’ as -3 -15V

Logic ‘0’ as +3 +15V

- Frame: Start bit

5 8 Data bit

None/Odd/Even Parity bit

1 or 2 Stop bit

- Baudrate: 9600, 11200, …

Protocol:

- Voltage level: Logic ‘1’ as -3 -15V

Logic ‘0’ as +3 +15V

- Frame: Start bit

5 8 Data bit

None/Odd/Even Parity bit

1 or 2 Stop bit

- Baudrate: 9600, 11200, …

OSI model

Open Systems Interconnection model

communications system

OSI model

Open Systems Interconnection model

communications system

Layer 1: Physical Layer

Defines the electrical and physical specifications for devices

RS-232RS-232

RS-485RS-485

SPISPI

I2CI2C

Physical Layer

Serial

Communications

Interface (SCI)

Serial

Communications

Interface (SCI)

Full-duplex

Asynchronous

Full-duplex

Asynchronous

Half-duplex

Synchronous

Half-duplex

Synchronous

peripheral systems

(CRT Terminals,

personal computers)

peripheral devices

(A/D or D/A integrated

circuits, serial EEPROMs,

other microcontrollers)

typically do not have

internal clocks for

baud rate generation

and require the

external clock signal

provided by a master

synchronous device

both send and receive at

the same time

devices take turns

transmitting and receiving

A serial I/O

communications

peripheral

A serial I/O

communications

peripheral

Clock generators

Shift registers

Data buffers

UART universal asynchronous receiver/transmitter

DUART A dual UART combines two UARTs into a single chip

USART universal synchronous/asynchronous receiver/transmitter

[1] http://www.freebsd.org/doc/en/articles/serial-uart/

[2] http://en.wikipedia.org/wiki/Universal_asynchronous_receiver/transmitter

[3] Microchip, PIC16F887 datasheet, part 12.0 p[153-178]

[4] http://en.wikipedia.org/wiki/Communications_protocol

[5] http://en.wikipedia.org/wiki/OSI_model