Chapter 5portal.unimap.edu.my/portal/page/portal30/Lecturer Notes... · Collector-Emitter Loop From...

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Chapter 5

Transistor bias circuits

1

Objectives

Discuss the concept of dc biasing of a transistor for

linear operation

Analyze voltage-divider bias, base bias, emitter bias

and collector-feedback bias circuits.and collector-feedback bias circuits.

2

Biasing

Biasing: The DC voltages applied to a transistor in

order to turn it on so that it can amplify the AC

signal.

3

Operating Point

The DC input establishes

an operating or

quiescent point called the

Q- point.

4

The Three States of Operation

• Active or Linear Region Operation

• Base–Emitter junction is forward biased Base–

Collector junction is reverse biased

• Cutoff Region Operation

• Base–Emitter junction is reverse biased• Base–Emitter junction is reverse biased

• Saturation Region Operation

• Base–Emitter junction is forward biased Base–

Collector junction is forward biased

5

DC Biasing Circuits

• Fixed-bias circuit

• Emitter-stabilized bias circuit

• Collector-emitter loop

• Voltage divider bias circuit• Voltage divider bias circuit

• DC bias with voltage feedback

6

Fixed Bias

7

The Base - Emitter Loop

From Kirchhoff’s voltage law:

+VCC – IBRB – VBE = 0

Solving for base current:Solving for base current:

B

− VBEVCC

RI B ====

8

Collector-Emitter Loop

Collector current:

I ==== ββββIBC

From Kirchhoff’s voltage law:From Kirchhoff’s voltage law:

VCE ==== VCC −−−− ICRC

9

Saturation

When the transistor is operating in saturation, current

through the transistor is at its maximum possible value.

VCCI Csat ====

R CCsat

R C

VCE ≅≅≅≅ 0 V

10

Load Line Analysis

The end points of the load line

are: ICsat

IC = VCC / RC

VCE = 0 V

VCEcutoffVCEcutoff

VCE = VCC

IC = 0 mA

The Q-point is the operating point:

• where the value of RB sets the value

of IB

• that sets the values of VCE and IC

11

Circuit Values Affect the Q-Point

12

Circuit Values Affect the Q-Point

13

Circuit Values Affect the Q-Point

14

Emitter-Stabilized Bias Circuit

Adding a resistor (RE)

to the emitter circuit

stabilizes the biasstabilizes the bias

circuit.

15

Base-Emitter Loop

From Kirchhoff’s voltage law:

+ VCC - IERE - VBE - IERE ====0

Since IE = (ββββ + 1)IB:

VCC - IBRB - (ββββ ++++1)IBRE ==== 0VCC - IBRB - (ββββ ++++1)IBRE ==== 0

Solving for IB:

EB

VCC - VBE

++++ (ββββ ++++1)RIB ==== R

16

Collector-Emitter Loop

From Kirchhoff’s voltage law:

CE C C CC+ I R − V = 0I

ER

E + V

Since IE ≅≅≅≅ IC:

VCE ==== VCC – IC(RC ++++ RE )VCE ==== VCC – IC(RC ++++ RE )

Also:

VE ==== IERE

VC ==== VCE ++++ VE ==== VCC - ICRC

VB ==== VCC – IRRB ==== VBE ++++ VE

17

Improved Biased Stability

Stability refers to a circuit condition in which the currents

and voltages will remain fairly constant over a wide range of

temperatures and transistor Beta (ββββ) values.

Adding RE to the emitter improves the stability of aAdding RE to the emitter improves the stability of a

transistor.

18

Saturation Level

The endpoints can be determined from the load line.

VCEcutoff: ICsat:

VCE ==== VCC

IC ==== 0mA VCC

RC ++++ RIC ====

VCE ==== 0 V

19

Voltage Divider Bias

This is a very stable

bias circuit.

The currents and The currents and

voltages are nearly

independent of any

variations in ββββ.

20

Approximate Analysis

Where IB << I1 and I1 ≅≅≅≅ I2:

21B

R ++++ R

R2VCCV ====

Where ββββRE > 10R2:

I ====VE

EE

R

VE ==== VB −−−− VBE

From Kirchhoff’s voltage law:

VCE = VCC − ICRC −IERE

IE ≅ IC

VCE =VCC−IC(RC + RE )

21

Voltage Divider Bias Analysis

Transistor Saturation Level

VCCIEC

==== ICmax ====CsatR ++++ R

Load LineAnalysis Load LineAnalysis

Cutoff: Saturation:

VCE ==== VCC

IC ==== 0mA

CE

VCC

RC ++++ RE

V ==== 0V

IC ====

22

DC Bias with Voltage Feedback

Another way to improve

the stability of a bias

circuit is to add a

feedback path from

collector to base.collector to base.

In this bias circuit the Q-

point is only slightly

dependent on the

transistor beta, ββββ.

23

Base-Emitter Loop

From Kirchhoff’s voltage law:

VCC – I′′′′CRC – IBRB – VBE – IERE ==== 0

Where IB << IC:

CI' = I

C + I

B ≅ I

C

Knowing I = ββββI and I ≅≅≅≅ I , the loop Knowing IC = ββββIB and IE ≅≅≅≅ IC, the loop

equation becomes:

VCC – ββββIBRC −−−− IBRB −−−− VBE −−−− ββββIBRE ==== 0

Solving for IB:

RB ++++ ββββ(RC ++++ RE )

VCC −−−− VBEIB ====

24

Collector-Emitter Loop

Applying Kirchoff’s voltage law:

IE + VCE + I’CRC – VCC = 0

Since I′′′′′′′′C ≅≅≅≅ IC and IC = ββββIB:

IC(RC + RE) + VCE – VCC=0

Solving for VCE:

VCE = VCC – IC(RC + RE)

25

Base-Emitter Bias Analysis

Transistor Saturation Level

ECCsat

VCCIR ++++ R

==== ICmax ====

Load LineAnalysis

Cutoff: Saturation:

V= VCCVCE

IC = 0mA ECC

I

VCE = 0 V

R + R= CC

26

PNP Transistors

The analysis for pnp transistor biasing circuits is the same as that for

npn transistor circuits. The only difference isthat the currents are

flowing in the opposite direction.

27

Base voltage

Emitter voltage

By Ohm’s Law,

Analysis of Voltage Bias for PNP Transistor

EE

EDC

B VRRR

RV

+=

ββββ21

1

BEBE VVV +=

VRIRIVV +++= By Ohm’s Law,

And,

DC

B

E

BEBEE

E RR

VVVI

β+

−−=

EECCCCEC

CCC

RIRIVV

RIV

−−=

=

BEEEBBBEEVRIRIVV +++=

28

Evaluate IC and VEC for pnp transistor circuit in Figure below.

Given VEE = +15V, R1 = 63kΩ, R2 = 27kΩ, RC = 1.8kΩ, RE =

2.6kΩ, βDC =120.

Example 1

29

Figure below shown the schematic with a negative supply

voltage, determine IC and VCE for a pnp transistor circuit with

given values: R1 = 25kΩ, R2 = 60kΩ, RC = 6kΩ, RE = 9kΩ,

VCC = -12V, and βDC = 90

Example 2

30

Construct a complete circuit required to replace the transistor in

Figure below with a pnp transistor. Given VCC = 10V, R1 =

78kΩ, R2 = 100kΩ, RC = 18kΩ, RE = 8kΩ.

Example 3

31