Post on 20-Dec-2015
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ECEn 224 © 2003-2008BYU
Mod-N Counters
• Generally we are interested in counters that count up to specific count values– Not just powers of 2
• A mod-N counter has N states– Counts from 0 to N-1 then rolls over– Requires flip flops
• For example…– A 4-bit binary counter is a mod-16 counter– A counter that counts from 0-9 is a mod-10 counter
N2log
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ECEn 224 © 2003-2008BYU
A Mod-4 CounterA.K.A. 2-bit counter
CLR INC Q1 Q0 N1 N0
0 0 0 0 0 00 0 0 1 0 10 0 1 0 1 00 0 1 1 1 10 1 0 0 0 10 1 0 1 1 00 1 1 0 1 10 1 1 1 0 01 - - - 0 0
00
10
0111
CLR’•INC
CLR’•INC’
CLR
CLR’•INCCLR’•INC
CLR’•INC
CLR’•INC’
CLR’•INC’
CLR’•INC’
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ECEn 224 © 2003-2008BYU
A Mod-4 Counter With Rollover Signal
CLR INC Q1 Q0 N1 N0 RO
0 0 0 0 0 0 00 0 0 1 0 1 00 0 1 0 1 0 00 0 1 1 1 1 00 1 0 0 0 1 00 1 0 1 1 0 00 1 1 0 1 1 00 1 1 1 0 0 11 - - - 0 0 0
00
10
0111
CLR’•INC
CLR’•INC’
CLR’•INCCLR’•INC
CLR’•INC / RO
CLR’•INC’
CLR’•INC’
The ROLL signal is used to tell other circuitry that the counter
is rolling over to all 0’s.
Mealy output CLR’•INC’CLR
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ECEn 224 © 2003-2008BYU
Cascaded Counters
• Larger counters can be built by combining smaller counters together
• The rollover signal is used to communicate when the upper counters should roll over
• Two types of counters– Asynchronous
– Synchronous
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ECEn 224 © 2003-2008BYU
Mod-4 Counter
2
inc
roll0
digit0
clrMod-4 Counter
2
roll1
digit1
clr
clk1clk
‘1’
Sequence should be:00-01-02-03-10-11-12-…
clk
digit0 2 0
roll0 / clk1
3
digit1 0 1
1 2
But we get:00-01-02-13-10-11-12-…
As a general rule….DO NOT tie the clock inputs on modules to anything but the clock!
Cascaded Asynchronous Counter
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ECEn 224 © 2003-2008BYU
clr
clk
digit0
digit1
roll0 / clk1
digit1 incrementstoo early
Cascaded Asynchronous Counter
Mod-4 Counter
2
inc
roll0
digit0
clrMod-4 Counter
2
roll1
digit1
clr
clk1clk
‘1’
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ECEn 224 © 2003-2008BYU
Cascaded Asynchronous Counter
• The more stages we add to the counter, the bigger the discrepancy between asynchronous counters and what we expect
Stage 1
Stage 2
Stage 3
Async
Async
Expected
Expected
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ECEn 224 © 2003-2008BYU
clk
digit0 2 0
roll0 / clk1
3
digit1 0 1
1 2
It is possible to modify the circuit to get the correct count sequence, but the roll signal must be glitch free!
The transition from the value 1 to 2 (012 to 102) makes it difficult, if not impossible to eliminate glitches.
Possible hazard
Mod4 Counter
2
inc
roll0
digit0
clrMod4
Counter
2
roll1
digit1
clr
clk1clk
‘1’
2
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ECEn 224 © 2003-2008BYU
Ripple Counters
• When you tie a rollover-like signal to a clock on the next higher digit � ripple counter
• A ripple counter is an asynchronous counter– Transitions are not all synchronized to the clock
– Different flip flops change at different times
– Similar to gated clocks (seen earlier)
• Asynchronous circuits are an advanced topic
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ECEn 224 © 2003-2008BYU
Another Common Ripple Counter
CLK
T QQ’
‘1’T QQ’
‘1’T Q
Q’
‘1’T Q
Q’
‘1’
Q3 Q2 Q1 Q0Counts in normal binary:
000000010010001101000101011001111000
……
What’s wrong with this design?
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ECEn 224 © 2003-2008BYU
Timing Diagram
clk
Q0
Q1
Q2
Q3
Q0 changes in response to clock edge
Only after Q0 changes does Q1’s FF get a clock
Only after that does Q2’s FF get a clock
Logic depending on Q3 has very little timeto react before next clock edge
Net effect is that all the FF’s change at different times!
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ECEn 224 © 2003-2008BYU
Asynchronous and Ripple Counters
• Because asynchronous and ripple counters are difficult to use correctly, they are avoided
• Do not use them in your designs!– Violates globally synchronous design principle
• Always use synchronous counters
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ECEn 224 © 2003-2008BYU
Synchronous Counters
• In a synchronous counter, all flip flops are clocked by the same clock signal– They all change at the same time
• Synchronous counters can be cascaded to create larger counters that are also globally synchronous
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ECEn 224 © 2003-2008BYU
D Q
D Q
IFL
inc
TerminalCount
RollOver
A Mod-4 Counter
CountValue
clr
CLR INCQ1 Q0 N1 N0 RO
0 0 0 0 0 0 00 0 0 1 0 1 00 0 1 0 1 0 00 0 1 1 1 1 00 1 0 0 0 1 00 1 0 1 1 0 00 1 1 0 1 1 00 1 1 1 0 0 11 - - - 0 0 0
clk
clk
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ECEn 224 © 2003-2008BYU
D Q
D Q
IFL
TerminalCount
RollOver
A Mod-4 Counter
CountValue
We could make a mod-4 counter from the block shown in red.
CLR INCQ1 Q0 N1 N0 RO
0 0 0 0 0 0 00 0 0 1 0 1 00 0 1 0 1 0 00 0 1 1 1 1 00 1 0 0 0 1 00 1 0 1 1 0 00 1 1 0 1 1 00 1 1 1 0 0 11 - - - 0 0 0
inc
clr
clk
clk
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ECEn 224 © 2003-2008BYU
Cascaded Counters
MOD4
inc
TC MOD4
inc
TC MOD4
inc
TC
CV CV CV
inc
clk
clr clr clr
clr
digit0[1:0] digit1[1:0] digit2[1:0]
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ECEn 224 © 2003-2008BYU
Cascaded Counters
MOD4
inc
TC MOD4
inc
TC MOD4
inc
TC
CV CV CV
inc
clk
clr clr clr
clr
TerminalCount
Rollover
CountValue
digit0[1:0] digit1[1:0] digit2[1:0]
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ECEn 224 © 2003-2008BYU
Cascaded Counters
MOD4
inc
TC MOD4
inc
TC MOD4
inc
TC
CV CV CV
inc
clk
clr clr clr
clr
Assume that the second timer is already at the terminal count.
digit0[1:0] digit1[1:0] digit2[1:0]
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ECEn 224 © 2003-2008BYU
Cascaded Counters
MOD4
inc
TC MOD4
inc
TC MOD4
inc
TC
CV CV CV
inc
clk
clr clr clr
clr
digit0[1:0] digit1[1:0] digit2[1:0]
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ECEn 224 © 2003-2008BYU
Cascaded Counters
MOD4
inc
TC MOD4
inc
TC MOD4
inc
TC
CV CV CV
inc
clk
clr clr clr
clr
digit0[1:0] digit1[1:0] digit2[1:0]
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ECEn 224 © 2003-2008BYU
Cascaded Counters
MOD4
inc
TC MOD4
inc
TC MOD4
inc
TC
CV CV CV
inc
clk
clr clr clr
clr
digit0[1:0] digit1[1:0] digit2[1:0]
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ECEn 224 © 2003-2008BYU
Cascaded Counters
MOD4
inc
TC MOD4
inc
TC MOD4
inc
TC
CV CV CV
inc
clk
clr clr clr
clr
digit0[1:0] digit1[1:0] digit2[1:0]
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ECEn 224 © 2003-2008BYU
Cascaded Counters
MOD4
inc
TC MOD4
inc
TC MOD4
inc
TC
CV CV CV
inc
clk
clr clr clr
clr
digit0[1:0] digit1[1:0] digit2[1:0]
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ECEn 224 © 2003-2008BYU
Cascaded Counters
MOD4
inc
TC MOD4
inc
TC MOD4
inc
TC
CV CV CV
inc
clk
clr clr clr
clr
It looks like the inc signal ripples from counter to counter.How is this different from the ripple counter examples?
digit0[1:0] digit1[1:0] digit2[1:0]
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ECEn 224 © 2003-2008BYU
10 11
00 01
digit0
roll
digit1
00
Cascaded Synchronous Counter
clk
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ECEn 224 © 2003-2008BYU
Cascaded Synchronous Counter
• Notice that all signals are synchronized with the system clock
clkdigit0digit1digit2
roll0
roll1
Signals:
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ECEn 224 © 2003-2008BYU
D Q
D Q
IFL
inc
TerminalCount
RollOver
A Mod-4 CounterWith consolidated rollover logic
CountValue
clr
clk
clk
A good mod-4 counter includes the logic within the red block.
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ECEn 224 © 2003-2008BYU
Cascading two Mod-4 Counters
0001020310111213202122233031323300…
Count Sequence:
MOD4
2
incroll0
digit0
Increment higher digit’s counter when lower digit’s
counter is rolling over
digit1 digit0
clr
MOD4
2
roll1
digit1
clr
clk clk
incincroll roll
dout doutclrclr
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ECEn 224 © 2003-2008BYU
Three-digit Mod-4 Counter
• Can combine any counters that have a rollover signal to make larger counters– Combine two 16-bit counters to make a 32-bit counter
– Combine three mod-4 counters to make a three-digit mod-4 counter
MOD4
2
incroll0
digit0
clr
MOD4
2
roll1
digit1
clr
clk clk
incincroll roll
dout doutclrclr
MOD4
2
roll1
digit2
clr
clk
incroll
doutclr
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ECEn 224 © 2003-2008BYU
BCD Counter
• Combine to create non-binary counters– BCD counter
MOD10
4
incroll0
digit0
clr
MOD10
4
roll1
digit1
clr
clk clk
incincroll roll
dout doutclrclr
MOD10
4
roll1
digit2
clr
clk
incroll
doutclr
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ECEn 224 © 2003-2008BYU
Hybrid Counters
• Can combine different kinds of mod counters– Combine an 8-bit counter with a 16-bit counter to create a 24-bit counter
– Combine mod-24 and mod-60 counters to create a digital H:M:S clock
MOD60
6
secmin
Seconds
clr
MOD60
6
hour
Minutes
clr
clk clk
incincroll roll
dout doutclrclr
MOD24
5
day
Hours
clr
clk
incroll
doutclr
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ECEn 224 © 2003-2008BYU
D Flip Flop with Asynchronous Clearand Clock Enable
Clock Enable(a.k.a. Load)
Clear(a.k.a. Reset)
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ECEn 224 © 2003-2008BYU
Reset
CLK
Digit0
CEO
Cascaded Synchronous Counter
Digit1
Digit0
CEO
Digit1
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ECEn 224 © 2003-2008BYU
Library Counters
• Component libraries often have several cascadable counters available
• Can be cascaded to form desired width
Xilinx Library Counters
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ECEn 224 © 2003-2008BYU
Summary
• Mod-N counters are counters that count from 0 to N-1 then roll over
• Adding rollover logic to counters allows us to cascade counters– We can build large counters from smaller ones– We can easily build non-binary counters
• BCD counter• HMS clock counter
• Always use synchronous counters instead of asynchronous counters